The AnalogML™ Core

Your solution for power intelligence at the edge

Breakthrough technology

Aspinity AnalogML Core Unique Features
Aspinity’s analogML™ (analog machine learning) core is the first reliable, purely analog machine learning processor.  Combining the sophisticated functionality of machine learning with ultra-low-power analog circuitry, the analogML core delivers a revolutionary power intelligent  approach to always-on edge processing that determines data relevancy earlier in the signal chain and allows higher power digital processors to focus their energy only on important data.

Built on Aspinity's unique and patented RAMP™ technology platform, the analogML core is a fully analog inferencing solution that uses just 10's of µAs to process and classify raw, unstructured sensor data in the analog domain. Keeping the downstream digital processors asleep unless relevant data is detected, an analogML-based architecture reduces always-on AI system power by up to 100x, delivering a 20x or more improvement in battery life and and dramatically reducing the amount of data transmitted to the cloud. 

Insight driven system wake-up

Aspinity analogML core power intelligent architecture
In a traditional always-on edge system, data relevance can only be determined after digitization. Since system power consumption is dominated by the ADC and digital processors, this digitally focused architecture is grossly inefficient and wastes significant power analyzing data that will simply be thrown away.

The analogML core eliminates this inefficiency by pulling the first data anlysis into the low power analog domain, enabling a power intelligent sense, process, and activate approach that uses near-zero power to detect and turn on more power consuming digital components only when needed for relevant data.

Aspinity analogML core power intelligent architecture

AnalogML™ Core Block Diagram

Aspinity AnalogML Core Block diagram
The analogML core consists of multiple software-controlled analog processing blocks that can be enabled, reconfigured, and tuned for various analyze-first applications such as smart home, IoT, consumer, industrial, and biomedical applications.  Since the analogML core is a fully analog processing chip, there is no clock and  each of the processing blocks can be powered independently when needed. These blocks are arranged as shown in the figure above and provide the following functionality:
  • Sensor interfacing: Interface circuitry can be synthesized for specific sensor types (microphone, accelerometer, etc.)
  • Analog feature extraction: Picks out salient features from raw, analog sensor data, drastically reduces the amount of data going into the neural network.
  • Analog neural network: Efficient, small-footprint analog inferencing block programmed with machine learning models that are developed using standard training environments.
  • Analog data compression: Continuous collection and compression of analog sensor data for low-power data buffering

Programming the AnalogML™ Core

Aspinity’s complete development environment allows engineers to build, compile, and load application specific analog machine learning models onto the analogML core. It has been specifically designed for engineers without analog expertise to be able to use standard training data and the standard programming interfaces that they are already accustomed to using.